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MCS BASIC-52 REFERENCE MANUAL

This document was originally picked up from a net as a raw scanned material. I reformatted it to HTML, and removed irrelevent page headers and page numbers. The original raw material can be downloaded here (419K). Although I removed scanning errors as I met them, I have not done deliberate spell-checking on the document.

I sure hope that Intel also realeased this material to Public Domain as well. If anyone knows differently, or wants to get credited for the scanning work, please let me know.

Have fun hacking. Mast.


Intel Corporation makes no warranty for the use of its products and assumes no responsibility for any errors which may appear in this document nor does it make a commitment to update the information contained herein.

Intel retains the right to make changes to these specifications at any time, without notice.

Contact your local sales office to obtain the latest specifications before placing your order.

The following are trademarks of Intel Corporation and may only be used to identify Intel Products:

Above, BITBUS, COMMputer, CREDIT, Data Pipeline, FASTPATH, Genius, i, I, ICE, iCEL, iCS, iDBP, iDlS, 121CE, iLBX, im~ iMDDX, iMMX, Insite, Intel, intel, intelBOS, Intelevision, inteligent Identifier, inteligent Programming, Intellec, Intellink, iOSP, iPDS, iPSC, iRMX, iSBC, iSBX, iSDM, iSXM, KEPROM, Library Manager, MAP-NET, MCS, Megachassis, MICROMAINFRAME, MULTIBUS, MULTICHANNEL, MULTIMODULE, MultiSERVER, ONCE, OpenNET, OTP, PC-BUBBLE, Plug-A-Bubble, PROMPT, Promware, QUEST, QueX, Quick-Pulse Programming, Ripplemode, RMX/80, RUPI, Seamless, SLD, UPI, and VLSiCEL, and the combination of ICE, iCS, iRMX, iSBC, iSBX, MCS, or UPI and a numerical suffix, 4-SITE.

MDS is an ordering code only and is not used as a product name or trademark.
MDS is a registered trademark of Mohawk Data Sciences Corporation.

MULTIBUS is a patented Intel bus.

Additional copies of this manual or other Intel literature may be obtained from:

Intel Corporation
Literature Distribution
Mail Stop SC6-59
3065 Bowers Avenue
Santa Clara, CA 95051

INTEL CORPORATION 1986

Table of Contents


CHAPTER 1
Introduction

1.1 Introduction to MCS BASIC-52 1
1.2 Getting Started 2
1.3 Getting Started-What Happens After Reset 2
1.4 Definition of Terms 4
1.5 What's the difference between Version 1.0 and Version 1.1 9

CHAPTER 2
Description of Commands

2.1 RUN 13
2.2 CONT 14
2.3 LIST 15
2.4 LIST# 16
2.5 LlST@ 17
2.6 NEW 18
2.7 NULL 19

CHAPTER 3
Description of EPROM File Commands

3.1 RAM and ROM 21
3.2 XFER 22
3.3 PROG 23
3.4 PROG1 and PROG2 24
3.5 FPROG, FPROG1 and FPROG2 25
3.6 PROG3, PROG4, FPROG3, and FPROG4 (Version 1.1 only) 26
3.7 PROG5, PROG6, FPROG5, and FPROG6 (Version 1.1 only) 27

CHAPTER 4
Description of Statements

4.1 BAUD 28
4.2 CALL 29
4.3 CLEAR 30
4.4 CLEARS and CLEARI 31
4.5 CLOCK1 and CLOCK0 32
4.6 DATA-READ-RESTORE 33
4.7 DIM 35
4.8 DO-UNTIL 36
4.9 DO-WHILE 37
4.10 END 38
4.11 FOR-TO-STEP-NEXT 39
4.12 GOSUB-RETURN 41
4.13 GOTO 43
4.14 ON GOTO-ON GOSUB 44
4.15 IF-THEN-ELSE 45
4.16 INPUT 47
4.17 LET 49
4.18 ONERR 50
4.19 ONEX1 51
4.20 ONTIME 52
4.21 PRINT 54
4.22 PRINT# 57
4.23 PH0., PH1., PH0. #, PH1. # 58
4.24 PRlNT@, PHO.@, PH1.@ (Version 1.1 Only) 59
4.25 PUSH 60
4.26 POP 61
4.27 PWM 62
4.28 REM 63
4.29 RETI 64
4.30 STOP 65
4.31 STRING 66
4.32 UI1 AND UI0 67
4.33 UO1 and UO0 68
4.34 IDLE (Version 1.1 only) 69
4.35 RROM (Version 1.1 only) 70
4.36 LD@ and ST@ (Version 1.1 only) 71
4.37 PGM (Version 1.1 only) 72

CHAPTER 5
Description of Arithmetic/Logical Operators and Expressions

5.1 Dual Operand (DYADIC) Operators 74
5.2 Unary Operators 76
5.2.1 General Purpose 76
5.2.2 Log Functions 78
5.2.3 Trig Functions 78
5.3 Understanding Precedence of Operators 80
5.4 How Relational Expressions Work 81

CHAPTER 6
Description of String Operators

6.1 What are Strings? 82
6.2 The ASC Operator 83
6.3 The CHR Operator 85

CHAPTER 7
Special Operators

7.1 Special Function Operators 86
7.2 Examples of Manipulating Special Function Operators 94
7.3 System Control Values 95

CHAPTER 8
Error Messages, Bells, Whistles, and Anomalies

8.1 Error Messages
96
8.2 Disabling Control-C 100
8.3 Implementating "Fake DMA" 101
8.4 Run Trap Option (Version 1.1 only) 102
8.5 Anomalies 103

CHAPTER 9
Assembly Language Linkage

9.1 Overview 104
9.2 General Purpose Routines 106
9.3 Unary Operators 113
9.4 Special Operators 115
9.5 Dual Operand Operators 118
9.6 Added Link Routines to Version 1.1 122
9.7 Interrupts 129
9.8 I/O Resource Allocation 131

CHAPTER 10
System Configuration

10.1 Memory/Hardware Configuration 132
10.2 EPROM Programming Configuration/Timing 135
10.3 Serial Port Implementation 136

CHAPTER 11

Reset Options (Version 1.1 only) 145

CHAPTER 12

Command/Statement Extensions (Version 1.1 only) 153

CHAPTER 13

Mapping User Code Memory (Version 1.1 only) 159

APPENDIX A

1.1 Memory Usage (Version 1.0 and Version 1.1) 162
1.2 Using the PWM Statement 170
1.3 Baud Rates and Crystals 174
1.4 Quick Reference 176
1.5 Instruction Set Summary 183
1.6 Floating Point Format 184
1.7 Storage Allocation 185
1.8 Format of an MCS BASIC-52 program 188
1.9 Answers to a Few Questions 190
1.10 Pin-out List 192
1.11 8052AH Special Function Registers 193
1.12 References 199

APPENDIX B

Instruction Set Summary 200

INDEX

INDEX 213

 

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