You might have noticed by now that some of external CODE memory locations that MCS BASIC-52 calls and uses are located around 2000H and some of the locations are located around 4000H. Specifically, they are as follows:
LOCATION FUNCTION 2001 H ON RESET, MCS BASIC-52 LOOKS FOR A 0AAH IN THIS LOCATION, IF PRESENT, CALLS LOCATION 2090H 2002H MCS BASIC-52 EXAMINES THIS LOCATION TO SEE IF THE USER WANTS TO IMPLEMENT THE COMMAND/STATEMENT EXTENSION OP- TION, A 05AH IS TO BE PLACED IN THIS LOCATION TO EVOKE THE COMMAND/EXTENSION OPTION 2048H MCS BASIC-52 CALLS THE LOCATION IF THE USER WANTS TO IMPLE- MENT THE COMMAND/STATEMENT EXTENSION OPTION. THE USER WILL USUALLY SET BIT 45 THEN RETURN. 2070H MCS BASIC-52 CALLS THIS LOCATION TO GET THE USER VECTOR TA- BLE ADDRESS WHEN THE COMMAND/STATEMENT EXTENSION OP- TION IS EVOKED. THE ADDRESS OF THE VECTOR TABLE IS PUT IN THE DPTR BY THE USER. 2078H MCS BASIC-52 CALLS THIS LOCATION TO GET THE USER LOOKUP TA- BLE ADDRESS WHEN THE COMMAND/STATEMENT EXTENSION OP- TION IS EVOKED. THE ADDRESS OF THE LOOKUP TABLE IS PUT IN THE DPTR BY THE USER. 2090H MCS BASIC-52 CALLS THIS LOCATION WHEN THE USER EVOKES THE ASSEMBLY LANGUAGE RESET OPTION 4003H EXTERNAL INTERRUPT 0 400BH TIMER0 INTERRUPT 4013H EXTERNAL INTERRUPT 1 401BH TIMER1 INTERRUPT 4023H SERIAL PORT INTERRUPT 402BH TIMER 2 INTERRUPT 4030H USER CONSOLE OUTPUT 4033H USER CONSOLE INPUT 4036H USER CONSOLE STATUS 403CH USER PRINT@ OR LIST@ VECTOR 4100H-41FFH USER CALLS FROM 0 TO 7FH
Other vectors between 2040H and 2090H also exist, but they are mainly for testing purposes, but for your information they are:
LOCATION FUNCTION 2040H TRAP LOCATION FOR EXTERNAL INTERRUPT 0 IF BIT 26H OF INTER- NAL RAM IS SET AND THE DMA OPTION IS EVOKED. PSW IS NOT PUSHED ONTO STACK. INTERRUPTS OF COURSE, MUST BE ENA- BLED. ALSO, THIS LOCATION WILL BE CALLED FOR CONSOLE OUT- PUT IF BIT 2CH OF INTERNAL RAM IS SET. 2050H TRAP LOCATION FOR SERIAL PORT INTERRUPT IF BIT 1FH OF INTER- NAL RAM IS SET. PSW IS PUSHED ONTO THE STACK. 2060H CALLED FOR CONSOLE INPUT IF BIT 32H OF INTERNAL RAM IS SET. 2068H CALLED FOR CONSOLE STATUS CHECK IF BIT 32H OF INTERNAL RAM IS SET. 2088H TIMER1 INTERRUPT TRAP IF BIT 1AH OF INTERNAL RAM IS SET. PSW IS PUSHED ONTO THE STACK.
Contrary to popular belief, these vectors were not chosen to force the user to buy bigger EPROMS. They are chosen so that addresses 2000H and 4000H can be overlayed and create no conflicts. The Overlayed addresses would appear as 2001H, 2002H, 4003H, 400BH, 4013H, 401BH, 4023H, 402BH, 4030H, 4033H, 4036H, 4039H, 2040H, 2048H, 2050H, 2060H, 2068H, 2070H, 2078H, 2088H, 2090H, and 4100H thru 41FFH. The diagram on the next page illustrates how to implement overlapping addresses for 2000H and 4000H. By using overlapping addresses, the user can implement all MCS BASIC-52 user expansion options with only a few hundred bytes of EPROM.
The reason this type of addressing scheme was chosen is that it permits the designer to offer custom versions of MCS BASIC-52, by using the vector locations in the 2000H region. And give the designers OEM the ability to take advantage of the I/O vectors located in the 4000H region.
As an added note, the MCS-51 instruction set is object relocatable on 2K boundaries if no LCALL or LJMP instructions are used. This means that it is possible for the designer to ORG a program for 2000H and actually execute the program at 2800H, 3000H, 3800H, etc. If the user does not use the LCALL or LJMP instructions.
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